Open-source tools, mixed-signal workflows and engineering support for teams exploring IC design.

Open-source EDA & AI has changed what’s possible

We help teams build and run practical ASIC flows, combining AI, open-source and commercial tools with hands-on engineering support.

That can mean setting up the design environment, improving an existing flow, solving difficult design problems, migrating to a new process or supporting a project through to tapeout.

The focus is simple: reduce development cost, remove bottlenecks and give teams the engineering capacity they need to get working silicon out the door.

If you are planning an ASIC project, struggling with your current flow or need experienced design support to get to tapeout, talk to us.

Your path to silicon

  • Get your silicon to tape out for ~50% less than a traditional design house

  • Chip in hand within months, not years

  • The same engagement model you’d expect from a software vendor

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How we help

  • Initial Discovery

    A practical starting point for teams exploring custom silicon. We set up a working design environment, train your engineers and help you assess whether an ASIC is the right route before you commit to a larger programme.

    • Working open-source EDA environment

    • Initial design flow setup

    • Training for your engineering team

    • Architecture and feasibility guidance

    • Advice on tools, IP and foundry processes

    • Clear next steps for a pilot design

    €25k–€100k

  • Design Enablement / Proof of concept

    For teams ready to move beyond exploration. We build and support the design flow around your project, then use it to develop a pilot design that proves the technical approach and reduces risk before a full tapeout.

    • Supported design flow built around your project

    • Pilot digital, analog or mixed-signal design

    • Tool and environment validation

    • Engineering support during implementation

    • Early verification and design checks

    • Plan and cost estimate for prototype silicon

    €100k–€300k

  • Custom Silicon

    End-to-end support for teams developing a full chip. We work alongside your engineers from architecture and implementation through verification, physical design and foundry handoff.

    • Architecture and implementation support

    • Digital, analog and mixed-signal engineering

    • Verification and physical design

    • Maintained EDA tools and workflows

    • Design reviews and issue resolution

    • Foundry and MPW preparation

    • Tapeout handoff and technical support

    €300k–€500k+

Frequently Asked Questions

  • We support digital, analog and mixed-signal projects, from early architecture and design decisions through implementation, verification and tapeout.

  • No. We use open-source and commercial tools depending on what the project needs. The aim is to build the best flow for the design, not force everything into one toolchain.

  • Yes. We can support an internal team with extra capacity, specialist expertise or ownership of a defined part of the project.

  • Our main expertise is in mature process technologies from 65nm to 180nm. We can help teams choose the right process for their design and support new ASICs, process migration and tapeout across this range.

  • Yes. We specialise in porting existing ASIC designs to a new foundry process.

Talk to us