A Platform Approach to Custom Automotive Silicon
ChipFlow’s Reference Design for Remote I/O ASICs
As the automotive industry adopts zonal architectures and software-defined vehicle strategies, the need for reliable, application-specific silicon at the edge is becoming critical. These systems demand low-latency communication, robust peripheral integration, and real-time control within a tightly constrained physical and electrical environment. General-purpose MCUs often fall short, while traditional custom ASIC development remains slow and expensive.
ChipFlow’s automotive Remote I/O ASIC reference design provides an alternative. It offers a reusable, verified SoC platform that supports customization without the overhead of full ground-up silicon development. The reference design includes support for 10BASE-T1S/automotive Ethernet, enabling robust, low-cost networking within modern in-vehicle environments. The reference design approach provides Automotive OEMs / Tier1s with a cheaper, faster and easier way to benefit from custom ASICs providing them with roadmap options that they don’t currently have while they try to navigate the most optimal transformation paths toward SDV architectures.
Overview: Automotive Remote I/O Template
The current reference design is built for use in zonal architecture automotive networks. These systems distribute control across localized compute nodes that manage sensors, and communication with domain or central ECUs. Remote I/O nodes must be compact, Ethernet-capable, and tailored to the specific functional requirements of each physical vehicle zone.
ChipFlow’s platform meets these needs by providing a pre-integrated SoC architecture that is both production-ready and modifiable. The baseline is implemented on GlobalFoundries 130BCD, a mature automotive qualified mixed-signal process.
All blocks are synthesizable and provided with integration and build scripts. The baseline is intended to support commercial deployment with minimal modification.
Support for Customization
The reference design is structured to allow for customer-specific IP integration. This includes analog interface adjustments, insertion of application logic, configuration of peripheral muxing, and implementation of functional safety or secure boot features.
Common modifications include:
Specialised analog blocks
Additional digital interfaces
Additional processor cores, digital signal processing and other
Customers may supply their own RTL or collaborate with ChipFlow engineering to develop modifications. Physical design, verification, tapeout, and manufacturing are handled by ChipFlow and its backend partners.
Automotive Focus, Broader Roadmap
ChipFlow is currently developing additional SoC templates that will support multiple industry needs.
Each template will be offered as an independent, verified platform with its own customization paths and production support.
Summary
ChipFlow’s automotive reference design platform provides a structured, cost-effective foundation for Remote I/O ASIC development. It enables OEMs and Tier 1 suppliers to deploy application-specific silicon tailored to zonal architectures without committing to a full custom flow. This approach reduces risk, compresses timelines, and improves control over final system behavior.
Custom silicon development does not need to start from scratch. With a verified reference platform, the path to differentiated hardware becomes practical and repeatable.
For automotive teams designing next-generation zonal systems, this platform provides a proven, production-oriented starting point.
If you would like to get started with our Remote I/O Reference Design then please get in touch today.
